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We are seeking a highly skilled and experienced DFT Engineer to join our team. The ideal candidate will have a strong background in Design for Testability (DFT) methodologies and implementation, with a deep understanding of Siemens/Synopsys DFT EDA tools and IEEE standards (1149, 1500, 1687). The role will involve developing and implementing DFT strategies for complex mixed-signal integrated circuits (ICs), ensuring high fault coverage and testability.
ASIC Implementation DFT Responsibilities
- Develop and implement DFT strategies for mixed-signal ICs, considering factors such as fault coverage, test time, and in-system test.
- Ensure compliance with IEEE standards (1149, 1687) for DFT methodologies and test patterns.
- Conduct fault simulation and coverage analysis to assess the effectiveness of DFT strategies and identify areas for improvement.
- Generate high-quality test patterns using automated test pattern generation (ATPG) tools.
- Verify the correctness of DFT implementation through simulation and hardware testing.
- Collaborate with design/implementation teams to ensure that DFT requirements are met throughout the process.
Minimum Qualifications
- Bachelor's degree in Electrical Engineering or Computer Engineering.
- Minimum 5+ years of experience in DFT for mixed-signal ICs.
- Understanding of DFT concepts, including scan insertion, BIST, and boundary scan.
- Proficiently use Siemens/Synopsys EDA tools for DFT-related tasks, including MBIST, scan insertion, and test pattern generation.
- In-depth knowledge of DFT EDA tools (Siemens/Synopsys).
- Experience with fault simulation and coverage analysis tools.
- Familiarity with IEEE standards 1149, 1500, and 1687.
- Problem-solving and analytical skills.
- Strong communications skills
- Work independently and as part of a team.
Preferred Qualifications
- Master's degree in Electrical Engineering or Computer Engineering.
- Experience with mixed-signal DFT methodologies.
- Knowledge of scripting languages (e.g., Perl, Python) for automation.
- Experience with hardware testing and debugging.
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